1. Field of the Invention
The present invention relates to antifuse-based field programmable gate array architectures. More particularly, the present invention relates to an antifuse-based field programmable gate array architecture which does not require the use of high-voltage isolation transistors to protect the outputs of logic function modules from the effects of high programming voltages used to program the antifuses in the interconnection arrays of such architectures.
2. The Prior Art
Antifuse-based field programmable gate array (FPGA) products include a plurality of logic function modules whose inputs and outputs are connectable to each other and to various I/O pads on the integrated circuit through an interconnect array of conductors by use of one-time programmable antifuse devices. The antifuses are programmed by placing a programming voltage across their two electrodes to disrupt a nonconducting antifuse layer disposed between the electrodes.
Antifuses are programmed at voltages that are higher than the logic transistors in the logic modules can tolerate without damage. In order to protect the transistors in the logic modules from these otherwise destructive programming voltages, the prior art has employed high-voltage isolation transistors disposed between the outputs of the logic function modules and the interconnection arrays.
While the high-voltage isolation transistors serve to protect the low-voltage transistors in the logic modules from destruction, they have the undesirable effect of adding a significant RC delay to the interconnection networks during normal operation of the programmed FPGA circuit after programming. In addition, a charge pump circuit must be disposed on the integrated circuit containing the FPGA in order to drive the gate of the high-voltage isolation transistor during normal circuit operation, thus adding layout and DC power overhead to the circuit design. Finally, the high-voltage isolation transistors add skew to the logic module outputs as their behavior is non-symmetrical between positive and negative transitions.
FPGA products designed by Actel Corporation, assignee of the present invention, have used one antifuse (referred to as an "F fuse") with no isolation transistor to connect logic modules to special conductive interconnect tracks, called "freeways", in the interconnect architecture. Use of "F fuse" devices complicates the device programming sequence, as the output of the module can only see one half the programming voltage. Because of this limitation, only a limited number of these "F fuse" antifuses can be used in such products. A portion of such an architecture is shown in U.S. Pat. No. 5,341,030.
It is an object of the present invention to provide an antifuse-based FPGA architecture which may be fabricated without the need for employing high-voltage isolation transistors.
It is a further object of the present invention to provide an antifuse-based FPGA architecture which has improved performance over prior-art antifuse-based FPGA architectures.
Yet another object of the present invention is to provide an antifuse-based FPGA architecture which may be implemented using currently-available technology.